GaAs JUNCTION LESS FinFET FOR HIGH PERFORMANCE ANALOG APPLICATIN IN sub-25 nm REGIME
By: CHHABRA (ANUJ).
Material type: BookPublisher: DELHI TECHNOLOGICAL UNIVERSITY 2018Description: 48.Subject(s): APPPLIED PHYSICSDDC classification: 620.5 CHH Dissertation note: M.TECH 2018 DR. RISHU CHAUJARItem type | Current location | Call number | Status | Date due | Barcode |
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Elec. Thesis & Dissertation |
Delhi Technological University
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620.5 CHH (Browse shelf) | Not for loan | TD-4292 |
M.TECH 2018 DR. RISHU CHAUJAR
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